HUANG C. | United Microelectronics Corp. (UMC), CRD Logic Division
スポンサーリンク
概要
関連著者
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HUANG C.
United Microelectronics Corp. (UMC), CRD Logic Division
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Lee K.
United Microelectronics Corp. (umc) Crd Logic Division
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Chen J.
United Microelectronics Corp. Logic Technology Department Technology & Process Development Divis
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LIOU F.
United Microelectronics Corp., Specialty Technology Department, Technology & Process Development Div
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CHENG Osbert
United Microelectronics Corp. (UMC), CRD Logic Division
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HUNG W.
United Microelectronics Corp. (UMC), CRD Logic Division
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JENG L.
United Microelectronics Corp. (UMC), CRD Logic Division
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TING S.
United Microelectronics Corp. (UMC), CRD Logic Division
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TSENG M.
United Microelectronics Corp. (UMC), CRD Logic Division
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WU J.
United Microelectronics Corp. (UMC), CRD Logic Division
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SHEN T.
United Microelectronics Corp. (UMC), CRD Logic Division
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LIANG C.
United Microelectronics Corp. (UMC), CRD Logic Division
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YEH W.K.
United Microelectronics Corp., Logic Technology Department, Technology & Process Development Divisio
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LIN C.
United Microelectronics Corp., Logic Technology Department, Technology & Process Development Divisio
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CHENG S.
United Microelectronics Corp., Logic Technology Department, Technology & Process Development Divisio
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SHIH H.
United Microelectronics Corp., Logic Technology Department, Technology & Process Development Divisio
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Yeh W.k.
United Microelectronics Corp. Logic Technology Department Technology & Process Development Divis
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Cheng Osbert
United Microelectronics Corp. (umc) Crd Logic Division
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Liou F.
United Microelectronics Corp. Logic Technology Department Technology & Process Development Divis
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Lin C.
United Microelectronics Corp. Logic Technology Department Technology & Process Development Divis
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Liang C.
United Microelectronics Corp. (umc) Crd Logic Division
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Jeng L.
United Microelectronics Corp. (umc) Crd Logic Division
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Tseng M.
United Microelectronics Corp. (umc) Crd Logic Division
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Hung W.
United Microelectronics Corp. (umc) Crd Logic Division
著作論文
- 56% pMOSFETs Drive Current Enhancement from Optimized Compressive Contact Etching Stop Layer (CESL) for 45nm Node CMOS
- The Impact for Gate Oxide Scaling (32Å-12Å) and Power Supply for Sub-0.1μm CMOSFETs