OKADA Keisuke | Mitsubishi Electric Corporation, Information Technology R&D Center
スポンサーリンク
概要
関連著者
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Okada Keisuke
Information And Technology R&d Center Mitsubishi Electric Corporation:(present Address)renesas T
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OKADA Keisuke
Mitsubishi Electric Corporation, Information Technology R&D Center
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Miki Takahiro
Mitsubishi Electric
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SUMI Tadashi
the System LSI Laboratory, Mitsubishi Electric Corporation
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Sumi T
The Authors Are With Electronics Research Laboratory Matsushita Electronics Corporation
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Miki Takahiro
System Lsi Division Mitsubishi Electric Corporation
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Miki T
Faculty Of Education Gunma University
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SUMI Tadashi
Mitsubishi Electric Corporation
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Okuda T
Nagoya Inst. Of Technol. Nagoya‐shi
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Okuda T
Isinomaki Senshu Univ. Ishinomaki‐shi Jpn
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Asano K
Information And Technology R&d Center Mitsubishi Electric Corporation
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Kohno Hiroyuki
Mitsubishi Electric Corporation
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Asano K
Nec Electronics Corporation
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MINEGISHI Noriyuki
Mitsubishi Electric Corporation, Information Technology R&D Center
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ASANO Ken-ichi
Mitsubishi Electric Corporation, Information Technology R&D Center
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SUZUKI Hirokazu
Mitsubishi Electric Corporation, Information Technology R&D Center
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KAN Takashi
Mitsubishi Electric Corporation, Information Technology R&D Center
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Kan Takashi
Mitsubishi Electric Corporation Information Technology R&d Center
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OKUDA Takashi
Mitsubishi Electric Corporation
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KUMAMOTO Toshio
Mitsubishi Electric Corporation
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ITO Masao
Mitsubishi Electric Corporation
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Ito M
Ntt Photonics Lab. Ibraki‐ken Jpn
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NAKAMURA Yasuyuki
Mitsubishi Electric Corporation
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AMISHIRO Hiroyuki
Mitsubishi Electric Corporation
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Okuda T
National Inst. Agrobiological Sci.
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Minegishi Noriyuki
Information And Technology R&d Center Mitsubishi Electric Corporation
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Suzuki Hirokazu
Mitsubishi Electric Corporation Information Technology R&d Center
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Kan Takashi
Mitsubishi Electric Corporation Computer & Information Systems Laboratory
著作論文
- A Debug System for Heterogeneous Multiple Processors in a Single Chip for Multimedia Communication(Special Issue on Test and Verification of VLSI)
- Static Linearity Error Analysis of Subranging A/D Converters (Special Section on Analog Technologies in Submicron Era)
- A 350-MS/s 3.3-V 8-bit CMOS D/A Converter Using a Delayed Driving Scheme (Special Section on Analog Circuit Techniques for System-on-Chip Integration)