Park Ki-tae | Samsung Electronics Co. Ltd.

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著作論文

Boosted Bit Line Program Scheme for Low Operating Voltage MLC NAND Flash Memory
A Low Power and Area Scalable High Voltage Switch Technique for Low Operation Voltage in MLC NAND Flash Memory
Improving read disturb characteristics by self-boosting read scheme for multilevel NAND flash memories (Special issue: Solid state devices and materials)
Improving read disturb characteristics by using double common source line and dummy switch architecture in multi level cell NAND flash memory with low power consumption (Special issue: Solid state devices and materials)

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