OHTA Chikara | Department of Computer Science and Systems Engineering, Kobe University
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概要
関連著者
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OHTA Chikara
Department of Computer Science and Systems Engineering, Kobe University
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KAWAGUCHI Hiroshi
Department of Orthopaedic Surgery, The University of Tokyo
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TAKEUCHI Takashi
Department of Pediatrics, Wakayama Medical University
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YOSHIMOTO Masahiko
Department of Computer Science and Systems Engineering, Kobe University
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Ohta Chikara
Department Of Computer Science And Systems Engineering Kobe University
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Ohta Chikara
Department of Computer and Systems Engineering, Kobe University
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OTAKE Yu
Department of Computer Science and Systems Engineering, Kobe University
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ICHIEN Masumi
Graduate School of Science and Technology, Kobe University
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GION Akihiro
Graduate School of Science and Technology, Kobe University
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Ohta Chikara
Faculty Of Engineering Kobe University
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Yoshimoto Masahiko
Mitsubishi Electric Corporation
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Kawaguchi Hiroshi
Kobe Univ. Kobe‐shi Jpn
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Morita Yasuhiro
Department Of Computer Science And Systems Engineering Kobe University
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Kawaguchi Hiroshi
Department Of Computer Science And Systems Engineering Kobe University
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Kawaguchi Hiroshi
Department Of Chemistry Faculty Of Science Kochi University
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Yoshimoto Masahiko
Department Of Computer Science And Systems Engineering Kobe University
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Yoshimoto Masahiko
System Lsi Development Center Mitsubishi Electric Corporation
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Yoshimoto M
Department Of Computer Science And Systems Engineering Kobe University
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Takeuchi Takashi
Department Of Computer Science And Systems Engineering Kobe University
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Takeuchi Takashi
Department Of Chemical Engineering Science Yokohama National University
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Kawaguchi Hiroshi
Department Of Applied Chemistry Faculty Of Engineering Utsunomiya University
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Yoshimoto Masahiko
Department of Computer and Systems Engineering, Kobe University
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MATSUDA Takashi
Department of Medicinal Chemistry, Kyoto Pharmaceutical University
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Ohta Chikara
Department Of Information Science And Intelligent Systems Faculty Of Engineering University Of Tokus
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IZUMI Shintaro
Department of Computer Science and Systems Engineering, Kobe University
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LEE Hyeokjong
Department of Computer Science and Systems Engineering, Kobe University
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KONISHI Toshihiro
Department of Computer Science and Systems Engineering, Kobe University
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TSURUDA Koh
Department of Computer Science and Systems Engineering, Kobe University
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SAKAI Yasuharu
Department of Computer Science and Systems Engineering, Kobe University
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Lee Hyeokjong
Department Of Computer Science And Systems Engineering Kobe University
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Izumi Shintaro
Department Of Computer Science And Systems Engineering Kobe University
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Ichien Masumi
Graduate School Of Science And Technology Kobe University
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Ishizaki Fumio
Department Of Information Science And Intelligent Systems Faculty Of Engineering University Of Tokus
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Ishizaki Fumio
Department Of Information Science And Intelligent Systems Faculty Of Engineering The University Of T
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Sakai Yasuharu
Department Of Computer Science And Systems Engineering Kobe University
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Tsuruda Koh
Department Of Computer Science And Systems Engineering Kobe University
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Otake Yu
Department Of Computer Science And Systems Engineering Kobe University
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TOJO Shinya
Department of Information Science and Intelligent Systems, Faculty of Engineering, University of Tok
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Gion Akihiro
Graduate School Of Science And Technology Kobe University
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Konishi Toshihiro
Department Of Computer Science And Systems Engineering Kobe University
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Matsuda Takashi
Department Of Computer Science And Systems Engineering Kobe University
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Tojo Shinya
Department Of Information Science And Intelligent Systems Faculty Of Engineering University Of Tokus
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Matsuda Takashi
Department Of Applied Mathematics And Physics Faculty Of Engineering Kyoto University
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Konishi Toshihiro
Department Of Computer And Systems Engineering Kobe University
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Tsuruda Koh
Department Of Computer And Systems Engineering Kobe University
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Lee Hyeokjong
Department Of Computer And Systems Engineering Kobe University
著作論文
- Cross-Layer Design for Low-Power Wireless Sensor Node Using Wave Clock
- Cross-Layer Design for Low-Power Wireless Sensor Node Using Wave Clock
- A 58-μW Single-Chip Sensor Node Processor with Communication Centric Design
- Phase Assignment Algorithm Based on Traffic Measurement for Real-Time MPEG Sources in ATM Networks