DONG Sheqin | EDA lab, Department of Computer Science and Technology, Tsinghua University
スポンサーリンク
概要
関連著者
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GOTO Satoshi
Graduate School of Information, Production and Systems, Waseda University
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Goto Satoshi
Waseda Univ. Jpn
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DONG Sheqin
EDA lab, Department of Computer Science and Technology, Tsinghua University
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ZHAO Kang
EDA lab, Department of Computer Science and Technology, Tsinghua University
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BIAN Jinian
EDA lab, Department of Computer Science and Technology, Tsinghua University
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SONG Yang
Graduate School of Information, Production and Systems, Waseda University
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Goto Satoshi
Graduate School Of Information Production And System Waseda University
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Dong Sheqin
Eda Lab Department Of Computer Science And Technology Tsinghua University
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Goto Satoshi
Graduate School of Infomlation Production and Systems Waseda University
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Song Yang
Graduate School Of Ips Waseda University
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Song Yang
Graduate School Of Information Production And Systems Waseda University
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Bian Jinian
Eda Lab Department Of Computer Science And Technology Tsinghua University
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Zhao Kang
Eda Lab Department Of Computer Science And Technology Tsinghua University
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Zhao Kang
Eda Lab Dep. Of Computer Sci. And Technol. Tsinghua Univ.
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Bian Jinian
Eda Lab Dep. Of Computer Sci. And Technol. Tsinghua Univ.
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GOTO Satoshi
Waseda University
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CHEN Song
Graduate School of Natural Science and Technology, Okayama University
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Chen Song
Graduate School Of Ips Waseda University
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Chen Song
Graduate School Of Information Production And Systems Waseda University
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YU Bei
EDA lab, Department of Computer Science and Technology, Tsinghua University
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Yu Bei
Eda Lab Department Of Computer Science And Technology Tsinghua University
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Chen Song
The Graduate School Of Information Production And Systems Waseda University
著作論文
- Pipeline-Based Partition Exploration for Heterogeneous Multiprocessor Synthesis
- Pipeline-Based Partition Exploration for Heterogeneous Multiprocessor Synthesis
- Exploring Partitions Based on Search Space Smoothing for Heterogeneous Multiprocessor System
- Fast Custom Instruction Identification Algorithm Based on Basic Convex Pattern Model for Supporting ASIP Automated Design
- Voltage and Level-Shifter Assignment Driven Floorplanning