IMAI Masashi | Research Center for Advanced Science and Technology, the University of Tokyo

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概要

• 同名の論文著者
• Research Center for Advanced Science and Technology, the University of Tokyoの論文著者

関連著者

• IMAI Masashi

  Research Center for Advanced Science and Technology, the University of Tokyo

• NAKAMURA Hiroshi

  Research Center for Advanced Science and Technology, the University of Tokyo

• NANYA Takashi

  Research Center for Advanced Science and Technology, the University of Tokyo

• Nanya T

  Research Center For Advanced Science And Technology The University Of Tokyo

• Nakamura Hiroshi

  Research And Development Division Technical Research Loborotory Kawasaki Dockyard Co. Ltd.

• Nanya Takashi

  Research Center For Advanced Science & Technology University Of Tokyo

• OZCAN Metehan

  東京大学先端科学技術研究センター

• OZCAN Metehan

  東京大学 先端科学技術研究センター

• KONDO Masaaki

  Research Center for Advanced Science and Technology, the University of Tokyo

• Oezcan M

  Faculty Of Engineering The University Of Tokyo

• Ozcan Metehan

  Research Center For Advanced Science And Technology The University Of Tokyo

• Kondo Masaaki

  Research Center For Advanced Science And Technology The University Of Tokyo

• 中村 宏

  東京大学

• WATANABE Kouichi

  Research Center for Advanced Science and Technology, the University of Tokyo

• 今井 雅

  東京大学駒場オープンラボラトリー

• Hori Atsushi

  Swimmy Software Inc.

• Ozawa Motokazu

  Research Center For Advanced Science And Technology The University Of Tokyo

• Ueno Yoichiro

  The Department Of Information And Communication Engineering Faculty Of Engineering Tokyo Denki Unive

• KONDO Masaaki

  CREST, JST (Japan Science and Technology Agency)

• HAYASHIDA Takuro

  Research Center for Advanced Science and Technology, The University of Tokyo

• Watanabe Kouichi

  Research Center For Advanced Science And Technology The University Of Tokyo:(present Office)graduate

• Hayashida T

  Research Center For Advanced Science And Technology The University Of Tokyo

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著作論文

• Design Method of High Performance and Low Power Functional Units Considering Delay Variations(Circuit Synthesis,VLSI Design and CAD Algorithms)
• A Cascade ALU Architecture for Asynchronous Super-Scalar Processors (Special Issue on Low-Power High-Performance VLSI Processors and Technologies
• Verification and Violation Correction of Timing Constraints for Gate-Level Asynchronous Circuits (特集:システムLSIの設計技術と設計自動化)
• 3E-3 Layout Methodology for SDI Model Asynchronous Circuits
• Evaluation of Checkpointing Mechanism on Score Cluster System(Dependable Software)(Dependable Computing)

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