Park Byung-Gook | Inter-University Semiconductor Research Center, Seoul National University, Kwanak-ku, Seoul 151-742, Korea
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- Inter-University Semiconductor Research Center, Seoul National University, Kwanak-ku, Seoul 151-742, Koreaの論文著者
論文 | ランダム
- Extraction of Trap Depth in Flash Cell Having Arch-Active Structure
- Design and Simulation of Self-Aligned Vertical Island Single Electron Transistor (VI-SET) with Electrical Tunneling Barrier
- Study on Dependence of Self-Boosting Channel Potential on Device Scale and Doping Concentration in 2-D and 3-D NAND-Type Flash Memory Devices
- Design and Simulation of Self-Aligned Vertical Island Single Electron Transistor (VI-SET) with Electrical Tunneling Barrier
- Study on Dependence of Self-Boosting Channel Potential on Device Scale and Doping Concentration in 2-D and 3-D NAND-Type Flash Memory Devices