Nomura Hiroshi | Process & Manufacturing Engineering Center, Semiconductor Company, Toshiba Corporation, 8 Shinsugita-cho, Isogo-ku, Yokohama 235-8522, Japan
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- Process & Manufacturing Engineering Center, Semiconductor Company, Toshiba Corporation, 8 Shinsugita-cho, Isogo-ku, Yokohama 235-8522, Japanの論文著者
Process & Manufacturing Engineering Center, Semiconductor Company, Toshiba Corporation, 8 Shinsugita-cho, Isogo-ku, Yokohama 235-8522, Japan | 論文
- Sub-55 nm Etch Process Using Stacked-Mask Process
- Ultrathin Resist Pattern Transfer Process by Filling Mask Material in the Resist Pattern
- Determination of Band Alignment of Hafnium Silicon Oxynitride/Silicon (HfSiON/Si) Structures using Electron Spectroscopy
- SOI/Bulk Hybrid Wafer Fabrication Process Using Selective Epitaxial Growth (SEG) Technique for High-End SoC Applications