Yamashita Hiroshi | Semiconductor Leading Edge Technologies
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概要
Semiconductor Leading Edge Technologies | 論文
- Suppression of Transient Enhanced Diffusion by Local-Oxidation-Silicon-Induced Stress
- Suppression of Transient Enhanced Diffusion by LOCOS Induced Stress
- Analysis of Non-Uniform Boron Penetration of Nitrided Oxide in PMOSFETs Considering Two-Dimensional Nitrogen Distribution
- Boron Penetration Enhanced by Gate Ion Implantation Damage in PMOSFETs
- Hydrogen-Enhanced Boron Penetration in PMOS Devices during SiO_2 Chemical Vapor Deposition