A three-dimensional simulation study of source/drain-tied double-gate fin field-effect transistor design for 16-nm half-pitch technology generation and beyond
スポンサーリンク
概要
著者
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Chen Chun-yu
Department Of Chemical Engineering National Taiwan University Of Science And Technology
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Chen Cheng-hsin
Department Of Gastroenterology And Hepatology Tokyo Medical And Dental University
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Eng Yi-Chuen
Department of Electrical Engineering, National Sun Yat-Sen University, No. 70, Lienhai Rd., Kaohsiung 80424, Taiwan, R.O.C.
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Lin Jyi-Tsong
Department of Electrical Engineering, National Sun Yat-Sen University, No. 70, Lienhai Rd., Kaohsiung 80424, Taiwan, R.O.C.
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Chang Tzu-Feng
Department of Electrical Engineering, National Sun Yat-Sen University, No. 70, Lienhai Rd., Kaohsiung 80424, Taiwan, R.O.C.
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Fan Yi-Hsuan
Department of Electrical Engineering, National Sun Yat-Sen University, No. 70, Lienhai Rd., Kaohsiung 80424, Taiwan, R.O.C.
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Lin Po-Hsieh
Department of Electrical Engineering, National Sun Yat-Sen University, No. 70, Lienhai Rd., Kaohsiung 80424, Taiwan, R.O.C.
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