Fabrication and Characteristics of Through Silicon Vias Interconnection by Electroplating
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概要
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The electroplating method was improved using double anodes and a penetrated jig to fill high-aspect-ratio through silicon vias (TSVs) with copper. In this study, the double anodes were used to limit the formation of voids that degrade the electrical properties when the device is working. In addition, in this study we examined how the V-shaped electroplated copper is formed in the first electroplating step to seal openings. After establishing the conditions for electroplating using the double anodes and current wave, a void-free interconnection was fabricated, which consisted of TSVs with a diameter of 40 μm and an aspect ratios of $6.25:1$ and $10:1$ for silicon interposers.
- 2011-01-25
著者
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Suh Su-Jeong
School of Advanced Materials Science and Engineering, Sungkyunkwan University, Suwon 440-746, Republic of Korea
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Kim Teak-You
School of Advanced Materials Science and Engineering, Sungkyunkwan University, Suwon, Gyeonggi-do 440-746, Korea
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Jang Jae-Gwon
School of Advanced Materials Science and Engineering, Sungkyunkwan University, Suwon, Gyeonggi-do 440-746, Korea
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Lim Seung-Kyu
School of Advanced Materials Science and Engineering, Sungkyunkwan University, Suwon, Gyeonggi-do 440-746, Korea
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Kim Nam-Jeong
School of Advanced Materials Science and Engineering, Sungkyunkwan University, Suwon, Gyeonggi-do 440-746, Korea
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