Temperature Coefficient of Threshold Voltage in High-$k$ Metal Gate Transistors with Various TiN and Capping Layer Thicknesses
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概要
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The temperature coefficient of $V_{\text{th}}$ ($=dV_{\text{th}}/dT$), which is commonly utilized for circuit design, was systematically obtained against various TiN and capping layer thicknesses in high-$k$/metal gate field-effect transistors (FETs). It is known that the magnitude of $|dV_{\text{th}}/dT|$ for such FETs is larger than that of polycrystalline silicon (poly-Si) gate FETs. The origins of the $dV_{\text{th}}/dT$ difference among high-$k$/metal gate FETs were attributed to differences in the temperature coefficient of flat band voltage ($=dV_{\text{FB}}/dT$) and the equivalent gate oxide thickness (EOT). Thicker TiN layers reduced $dV_{\text{FB}}/dT$, which enlarged the magnitude of $|dV_{\text{th}}/dT|$. The EOT increased as the TiN metal layer or Al2O3 capping layer increased in thickness. The large EOT led to an increase in $|dV_{\text{th}}/dT|$, since $dV_{\text{th}}/dT$ is a function of the inverse of gate capacitance. In contrast, La2O3 capping hardly affected $dV_{\text{th}}/dT$. This is because La2O3 capping did not affect EOT differently from Al2O3 capping. The relationship between $dV_{\text{th}}/dT$ and EOT implies that EOT scaling relieves the issue of large $|dV_{\text{th}}/dT|$ for high-$k$/metal gate FETs.
- 2010-04-25
著者
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Hidekazu Oda
Production Technology Development Division, Renesas Technology Corp., 751, Horiguchi, Hitachinaka, Ibaraki 312-8504, Japan
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Katsumi Eikyu
Production Technology Development Division, Renesas Technology Corp., 751, Horiguchi, Hitachinaka, Ibaraki 312-8504, Japan
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Nishida Yukio
Production Technology Development Division, Renesas Technology Corp., 751, Horiguchi, Hitachinaka, Ibaraki 312-8504, Japan
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Eikyu Katsumi
Production Technology Development Division, Renesas Technology Corp., 751, Horiguchi, Hitachinaka, Ibaraki 312-8504, Japan
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Shimizu Akihiro
Production Technology Development Division, Renesas Technology Corp., 751, Horiguchi, Hitachinaka, Ibaraki 312-8504, Japan
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Tomohiro Yamashita
Production Technology Development Division, Renesas Technology Corp., 751, Horiguchi, Hitachinaka, Ibaraki 312-8504, Japan
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Yasuo Inoue
Production Technology Development Division, Renesas Technology Corp., 751, Horiguchi, Hitachinaka, Ibaraki 312-8504, Japan
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Kentaro Shibahara
Graduate School of Advanced Sciences of Matter, Hiroshima University, 1-4-2 Kagamiyama, Higashihiroshima, Hiroshima 739-8527, Japan
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Nishida Yukio
Production Technology Development Division, Renesas Technology Corp., 4-1 Mizuhara, Itami, Hyogo 664-0005, Japan
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Yukio Nishida
Production Technology Development Division, Renesas Technology Corp., 751, Horiguchi, Hitachinaka, Ibaraki 312-8504, Japan
関連論文
- Temperature Coefficient of Threshold Voltage in High-$k$ Metal Gate Transistors with Various TiN and Capping Layer Thicknesses
- Stress from Discontinuous SiN Liner for Fully Silicided Gate Process