Feasibility Study of a Novel Four Transistor Silicon-on-Insulator Static Random Access Memory Cell Utilizing Partial Trench Isolation
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概要
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A novel static random access memory (SRAM) cell composed of four thin film silicon-on-insulator (TFSOI) metal–oxide–semiconductor field-effect transistors (MOSFETs) intended for 0.5 V operation is proposed. The body regions of the cross-coupled transistor pair are utilized as load resistors. Transfer MOSFETs connecting each SRAM cell to a word line are dynamic threshold MOSFETs (DTMOSs). By utilizing partial trench isolation, the need of special gate shapes for realizing body contacts is eliminated in the proposed SRAM cell. A device simulator with circuit analysis capability reveals that the proposed SRAM cell can be operated properly under a supply voltage of as low as 0.5 V.
- 2007-08-15
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