Device Characteristics of Pentacene Dual-Gate Organic Thin-Film Transistor
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概要
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We fabricated pentacene organic thin-film transistors (OTFTs) with a dual-gate structure, in which 300-nm-thick thermally grown SiO2 and 500-nm-thick parylene were used as a bottom-gate and a top-gate dielectric, respectively. The threshold voltage ($V_{\text{th}}$) of the dual-gate OTFT changed systematically with the application of voltage bias to the top-gate electrode. When voltage bias from $-20$ to 20 V was applied to the top-gate electrode, $V_{\text{th}}$ changed from 9.4 to $-9.3$ V. The range of $V_{\text{th}}$ shift in the dual-gate OTFT with a thin 10 nm pentacene layer was much wider than that with a thick 500 nm pentacene layer. This shift of $V_{\text{th}}$ due to the body effect allows the change from an enhancement- to a depletion-mode transistor, which is beneficial for the fabrication of organic circuits.
- 2007-08-15
著者
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Koo Jae
IT Convergence and Components Laboratory, IT Components and Materials Research Division, Electronics and Telecommunications Research Institute, 161 Gajeong-dong, Yuseong-gu, Daejeon 305-700, Korea
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You In
IT Convergence and Components Laboratory, IT Components and Materials Research Division, Electronics and Telecommunications Research Institute, 161 Gajeong-dong, Yuseong-gu, Daejeon 305-700, Korea
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Suh Kyung
IT Convergence and Components Laboratory, IT Components and Materials Research Division, Electronics and Telecommunications Research Institute, 161 Gajeong-dong, Yuseong-gu, Daejeon 305-700, Korea
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Kim Seong
IT Convergence and Components Laboratory, IT Components and Materials Research Division, Electronics and Telecommunications Research Institute, 161 Gajeong-dong, Yuseong-gu, Daejeon 305-700, Korea
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Suh Kyung
IT Convergence and Components Laboratory, ETRI, 161 Gajeong-dong, Yuseong-gu, Daejeon 305-700, Republic of Korea
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