Silicon Complementary Metal–Oxide–Semiconductor Field-Effect Transistors with Dual Work Function Gate

スポンサーリンク

概要

• 論文の詳細を見る

• This paper discusses silicon complementary metal–oxide–semiconductor (CMOS) field-effect transistors with dual work function gates (DWFG) to improve transconductance ($g_{\text{m}}$) and drain conductance ($g_{\text{ds}}$) characteristics. For a n-channel metal–oxide–semiconductor field-effect transistor (MOSFET) device, the polycrystalline silicon (poly-Si) gate on the source and drain side are doped p+ and n+, respectively and vice versa for a p-channel MOSFET. The work function difference in a poly-Si gate affects channel potential distribution and increases the lateral electric field inside the channel. The increased electric field inside the channel improves carrier drift velocity. Experimental results from the fabricated DWFG devices show improved $g_{\text{m}}$ and $g_{\text{ds}}$ over conventional single work function gate devices.

• 2006-12-15

著者

• Na Kee-Yeol

  Dept. of Semiconductor Engineering, Chungbuk National University, Cheongju, Chungbuk 361-763, Korea

• Kim Yeong-Seuk

  Dept. of Semiconductor Engineering, Chungbuk National University, Cheongju, Chungbuk 361-763, Korea

関連論文

• Silicon Complementary Metal–Oxide–Semiconductor Field-Effect Transistors with Dual Work Function Gate
• Optimizing the Gate-to-Drift Overlap Length of Lateral Double Diffused Metal–Oxide–Semiconductor Field Effect Transistor Devices to Improve Hot-Carrier Device Lifetime

スポンサーリンク