Single error correction, double error detection and double adjacent error correction with no mis-correction code
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概要
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Single error correction, double error detection and double adjacent error correction (SEC-DED-DAEC) code without mis-correction of double non-adjacent error is proposed to achieve high reliability protection against soft errors in on-chip memory systems. To eliminate mis-correction among information bits, the orthogonality of orthogonal Latin square codes is engrafted in the H-matrix of the proposed code. Experimental results show that there is no mis-correction for the proposed code and the overhead of implementation is lower than that of other SEC-DED-DAEC codes. The proposed SEC-DED-DAEC code is suitable for applications to on-chip memory with high reliability.
著者
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LEE Yong-surk
School of Electrical & Electronic Engineering, Yonsei University
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Lee Yong-surk
School of Electrical and Electronic Engineering, Yonsei Univsity
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Jun Ho-yoon
School of Electrical and Electronic Engineering, Yonsei Univsity
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