A Partial Access Mechanism on a Register for Low-Cost Embedded Multimedia ASIP

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概要

• 論文の詳細を見る

• In this letter, we propose a partial access mechanism to be used on a register file for low-cost embedded multimedia processor architecture. In the embedded system, supporting the SIMD operations is a burden because of the wide SIMD register file and its execution unit. So a new architecture is proposed to increase the performance of SIMD operations with minimal additional hardware overhead. To evaluate the performance and hardware overhead, this architecture is adopted to an embedded multimedia processor and simulated with five DSP benchmarks. The simulation results indicate that the performance is increased by 38% and the total area is increased by 13.4%. The proposed partial access mechanism may be useful for low-cost embedded multimedia ASIP.

• （社）電子情報通信学会の論文
• 2008-07-01

著者

• Hur Won

  Processor Lab. School Of Electrical And Electronic Engineering Yonsei Univ.

• Cho Min-young

  School Of Electrical & Electronic Engineering Yonsei University

• Jeong Ha-young

  School Of Electrical & Electronic Engineering Yonsei University

• HUR Won

  School of Electrical & Electronic Engineering, Yonsei University

• LEE Yong-surk

  School of Electrical & Electronic Engineering, Yonsei University

• Hur Won

  School Of Electrical & Electronic Engineering Yonsei University

• Lee Yong-surk

  School Of Electrical & Electronic Engineering Yonsei University

関連論文

• A Partial Access Mechanism on a Register for Low-Cost Embedded Multimedia ASIP
• Scalable distributed memory embedded system with a low-cost hardware message passing interface
• Single error correction, double error detection and double adjacent error correction with no mis-correction code

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