Dual-Core Framework: Eliminating the Bottleneck Effect of Scalar Kernels on SIMD Architectures

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概要

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• The efficiency of ubiquitous SIMD (Single Instruction Multiple Data) media processors is seriously limited by the bottleneck effect of the scalar kernels in media applications. To solve this problem, a dual-core framework, composed of a micro control unit and an instruction buffer, is proposed. This framework can dynamically decouple the scalar and vector pipelines of the original single-core SIMD architecture into two free-running cores. Thus, the bottleneck effect can be eliminated by effectively exploiting the parallelism between scalar and vector kernels. The dual-core framework achieves the best attributes of both single-core and dual-core SIMD architectures. Experimental results exhibit an average performance improvement of 33%, at an area overhead of 4.26%. What's more, with the increase of the SIMD width, higher performance gain and lower cost can be expected.

著者

• CHEN Shuming

  National University of Defense Technology

• ZHANG Kai

  National University of Defense Technology

• WANG Yaohua

  National University of Defense Technology

• CHEN Hu

  National University of Defense Technology

• WAN Jianghua

  National University of Defense Technology

• LIU Sheng

  National University of Defense Technology

関連論文

• Dual-Core Framework: Eliminating the Bottleneck Effect of Scalar Kernels on SIMD Architectures
• Cooperative communication based barrier synchronization in on-chip mesh architectures

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