Reduced Reconfigurable Logic Circuit Design Based on Double Gate CNTFETs Using Ambipolar Binary Decision Diagram
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概要
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This letter describes the design methodology for reduced reconfigurable logic circuits based on double gate carbon nanotube field effect transistors (DG-CNTFETs) with ambipolar propoerty. Ambipolar Binary Decision Diagram (Am-BDD) which represents the cornerstone for automatic pass transistor logic (PTL) synthesis flows of ambipolar devices was utilized to build DG-CNTFET based n-input reconfigurable cells in the conventional approach. The proposed method can reduce the number of ambipolar devices for 2-inputs reconfigurable cells, incorporating the simple Boolean algebra in the Am-BDD compared with the conventional approach. As a result, the static 2-inputs reconfigurable circuit with 16 logic functions can be synthesized by using 8 DG-CNTFETs although the previous design method needed 12 DG-CNTFETs for the same purpose.
著者
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KOBAYASHI Manabu
Department of Information Science, School of Engineering, Shonan Institute of Technology
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Ninomiya Hiroshi
Department Of Applied Physics Faculty Of Science Fukuoka University
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WATANABE Shigeyoshi
Department of Information Science, School of Engineering, Shonan Institute of Technology
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WATANABE Shigeyoshi
Department of Information Science, Shonan Institute of Technology
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