Circuit Design of Reconfigurable Logic Based on Double-Gate CNTFETs
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概要
- 論文の詳細を見る
I. O'Connor et al. have proposed a dynamically reconfigurable dynamic logic circuit (DRDLC) to generate some logic functions by using the double-gate (DG) carbon nanotube (CNT) FETs which have the ambipolar property [1]. This DRDLC consists of seven transistors to generate 14 logic functions which do not include the XOR and XNOR functions. On the other hand, K. Jabeur et al. have proposed a DRDLC to generate the whole set of 16 logic functions including XOR and XNOR by adding 4 or 8 transistors to O'Connor's circuit [5]. In this letter, we propose a DRDLC, which consists of only seven transistors, to generate the whole set of 16 logic functions by using DG-CNTFETs. Finally, we show that the number of transistors can be reduced compared to the conventional DRDLC to generate 16 logic functions.
著者
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KOBAYASHI Manabu
Department of Information Science, School of Engineering, Shonan Institute of Technology
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Ninomiya Hiroshi
Department Of Applied Physics Faculty Of Science Fukuoka University
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WATANABE Shigeyoshi
Department of Information Science, School of Engineering, Shonan Institute of Technology
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