Automatic Defect Classification System in Semiconductors EDS Test Based on System Entity Structure Methodology

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概要

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• We exploit a structural knowledge representation scheme called System Entity Structure (SES) methodology to represent and manage wafer failure patterns which can make a significant influence to FABs in the semiconductor industry. It is important for the engineers to simulate various system verification processes by using predefined system entities (e.g., decomposition, taxonomy, and coupling relationships of a system) contained in the SES. For better computational performance, given a certain failure pattern, a Pruned SES (PES) can be extracted by selecting the only relevant system entities from the SES. Therefore, the SES-based simulation system allows the engineers to efficiently evaluate and monitor semiconductor data by i) analyzing failures to find out the corresponding causes and ii) managing historical data related to such failures.

著者

• HAN Young-Shin

  Yeungnam Univ.

• KIM SoYoung

  Sungkyunkwan Univ.

• KIM TaeKyu

  Security Management Institute

• JUNG Jason

  Yeungnam University

関連論文

• Automatic Defect Classification System in Semiconductors EDS Test Based on System Entity Structure Methodology
• Automatic Defect Classification System in Semiconductors EDS Test Based on System Entity Structure Methodology

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