A New Bottom-Gated Polysiliccon Thin Film Transistors with Polysilicon spacer

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概要

• 論文の詳細を見る

• In this study, a new bottom-gated polysilicon thin film transistor with polysilicon spacer has been studied. Our simulation results show that the electric field near drain in the TFT with polysilicon spacer is reduced considerably compared with conventional TFT without polysilicon spacer. We found the structure with polysilicon spacer can effectively improve the impact ionization. The polysilicon spacer provides an effective way to spread the electric field out and improve the device performance. Due to the polysilicon spacer is located in the channel, the on current is maintained.

• 社団法人電子情報通信学会の論文
• 2009-06-17

著者

• Li T.

  Dept. of Electronic Engineering, Feng Chia University

• Chien F.

  Dept. of Electronic Engineering, Feng Chia University

• Liao C.

  Dept. of Electrical Engineering, National Central University

• Tsai Y.

  Dept. of Electrical Engineering, National Central University

• Liao C.

  Dept. Of Electrical Engineering National Central University

• Chen Y.

  Dept. Of Electronic Engineering Feng Chia University

• Tsai Y.

  Dept. Of Electrical Engineering National Central University

• Chien F.

  Dept. Of Electronic Engineering Feng Chia University

• Li T.

  Dept. Of Electronic Engineering Feng Chia University

関連論文

• A New Combination of RSD and Inside Spacer Thin Film Transistor
• AC Power Loss and Signal Coupling in VLSI backend Interconnects
• A New Combination of RSD and Inside Spacer Thin Film Transistor
• A New Bottom-Gated Polysiliccon Thin Film Transistors with Polysilicon spacer
• A New Bottom-Gated Polysiliccon Thin Film Transistors with Polysilicon spacer

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