Simultaneous Multistandard PHY Processing : A Low-Complexity Processor Resource Management Algorithm
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概要
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This paper presents a simple and efficient processor resource management algorithm for simultaneous execution of multiple air interfaces at the physical layer. Processor resources refer to available memory and cycles. Each physical layer task is called a load and characterized in terms of total memory and cycles it requires. The key challenges faced by our proposed method are twofold. First, the air interfaces are asynchronous. A new load can be presented to the processor at any time during its execution of a previous load. Second, obviously there are limits to available memory and cycles within a single-chip processor. How does the algorithm handle overload conditions? In this paper, we describe how these problems can be solved efficiently.
- 2009-02-25
著者
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Wei Khoo
PHYBIT, INC.
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Homayounfar Kambiz
PHYBIT, INC.
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Wei Khoo
Phybit Inc.
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Homayounfar Kambiz
Phybit Inc.
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- Simultaneous Multistandard PHY Processing : A Low-Complexity Processor Resource Management Algorithm
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