Conducted-noise reduction of randomly switched buck converter using FPGA (電気通信エネルギー技術)
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概要
- 論文の詳細を見る
This paper describes design and implementation of a low noise digitally controlled buck converter. The switching noise produced by the switching-mode power supply (SMPS) has been reduced by randomly varying the switching frequency of the buck converter. The implementation of SMPS has been accomplished by using field-programmable gate array (FPGA)-based digital controller. Breadboard has been built-up for testing the effect of random-switching control in DC-DC Converters. It includes DC-DC power switching circuit, power switch driver, analog to digital conversion circuit and its driver, and the proposed FPGA-based digital controller. Experimental results show that the conducted-noise spectrum has been significantly improved and the noise level has been effectively reduced.
- 社団法人電子情報通信学会の論文
- 2008-05-02
著者
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DOUSOKY Gamal
Department of Electrical and Electronic Systems Engineering, Graduate School of Information Science
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SHOYAMA Masahito
Department of Electrical and Electronic Systems Engineering, Graduate School of Information Science
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SHOYAMA Masahito
Kyushu University
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NINOMIYA Tamotsu
Nagasaki University
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DOUSOKY Gamal
Kyushu University
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Dousoky Gamal
Department Of Electrical And Electronic Systems Engineering Graduate School Of Information Science A
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Shoyama Masahito
Department Of Electrical And Electronic Systems Engineering Graduate School Of Information Science A
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Ninomiya Tamotsu
Department Of Electrical And Electronic Systems Engineering Graduate School Of Information Science A
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二宮 保
Department of Electrical and Electronic Systems Engineering, Graduate School of Information Science and Electrical Engineering, Kyushu University
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