Performance analysis on optically-enabled SMP servers (ハイパフォーマンスコンピューティング・2007年並列/分散/協調処理に関する『旭川』サマー・ワークショップ(SWoPP旭川2007)--研究会・連続同時開催)
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概要
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This paper analyzes the performance and utilization of the cache, memory, and their interconnects in optically-enabled SMP servers, and discusses cases where the optical interconnect is applied to either the cache coherent SMP link or the memory link. The analysis are conducted with a cycle-accurate full system simulation tool running HPC benchmarks, taking care of the extra latency due to the time-of-flight (e.g., 1 meter-5ns). The simulation results show that the performance with the optical memory link is better than that with the optical SMP link as the number of nodes increases under realistic configurations. By observing the inside of the processors and the SMP server systems, we identified that the topological differences cause a performance crossover.
- 一般社団法人情報処理学会の論文
- 2007-08-01
著者
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Okazaki Atsuya
Ibm Research Tokyo Research Laboratory
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KATAYAMA YASUNAO
IBM RESEARCH, TOKYO RESEARCH LABORATORY
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Katayama Yasunao
Ibm Research Tokyo Research Laboratory
関連論文
- Secure Processor Architecture for High-Speed Verification of Memory Integrity
- Performance analysis on optically-enabled SMP servers (ハイパフォーマンスコンピューティング・2007年並列/分散/協調処理に関する『旭川』サマー・ワークショップ(SWoPP旭川2007)--研究会・連続同時開催)