Hot Carrier Relief of Metal Oxide Semiconductor Field Effect Transistor by Using Work-Function Engineering
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概要
- 論文の詳細を見る
A detailed analysis of hot-carrier-degraded NMOS and PROS devices with either n^+ or p^+ gates is presented. For this analysis, we utilized a new simulation tool which allows direct monitoring of the buildup of charge and interface states during the DC stress experiments. The impact of the work-function difference of the n^+ and p^+ gate material on the injection conditions of hot carriers into the gate oxide will also be considered. Our results indicate that both NMOS and PMOS FETs with p^+ gates are superior regarding hot-carrier stability.
- 社団法人応用物理学会の論文
- 1990-12-20
著者
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Hansch Wilfried
Siemens Ag Corporate Research And Development:(present Address) Ibm
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SCHWALKE Udo
SIEMENS AG, Corporate Research and Development
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LILL Arnulf
SIEMENS AG, Corporate Research and Development
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Schwalke U
Siemens Corporate Technol. Munich Deu
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Lill Arnulf
Siemens Ag Corporate Research And Development
関連論文
- Hot Carrier Relief of Metal Oxide Semiconductor Field Effect Transistor by Using Work-Function Engineering
- Dual-Workfunction Gate Engineering in a Corner Parasitics-Free Shallow-Trench-Isolation Complementary-Metal-Oxide-Semiconductor Technology