Neutral Electron Trap Generation and Hole Trapping in Thin Oxides under Electrostatic Discharge Stress
スポンサーリンク
概要
- 論文の詳細を見る
- 社団法人応用物理学会の論文
- 1998-04-15
著者
-
CHIM Wai
Centre for Integrated Circuit Failure Analysis and Reliability, Faculty of Engineering, National Uni
-
Chim Wai
Centre For Integrated Circuit Failure Analysis And Reliability Faculty Of Engineering National Unive
-
TEH Gim
Centre for Integrated Circuit Failure Analysis and Reliability, Faculty of Engineering, National Uni
-
Teh Gim
Centre For Integrated Circuit Failure Analysis And Reliability Faculty Of Engineering National Unive
関連論文
- Stress-Induced Leakage Current and Lateral Nonuniform Charge Generation in Thermal Oxides Subjected to Negative-Gate-Voltage Impulse Stressing
- Post-stress Dual-trap Interaction in Hot-carrier Stressed Submicrometer N-channel Metal-Oxide-Semiconductor Field-Effect-Transistors
- Neutral Electron Trap Generation and Hole Trapping in Thin Oxides under Electrostatic Discharge Stress