Carrier Reset Operation in Charge Modulation Device

概要

論文の詳細を見る
The reset operation of the charge modulation device (CMD) transistor was examined by experiments and calculations. It was clarified that such conditions as high drain voltage, low reset gate voltage, short reset time or sealing down the size of the CMD transistor have a tendency to cause reset incompleteness. However, it was revealed experimentally that an ordinary bias condition for the CMD imager leads to complete reset in 50 ns reset pulse duration even if the size of the CMD transistor is scaled down to 5.0 μm×5.2 μm. This reset time is very short compared to the allowed time for the CMD reset operation of about 10 μs and 1 μs in national television system committee (NTSC) and high definition television (HDTV) format, respectively. It was also revealed by calculations that lowering the drain voltage synchronized with reset timing is very promising for rapid and complete reset operation. This method is applicable to all sizes of CMDs.
社団法人応用物理学会の論文
1993-09-15