POLYCRYSTALLINE SILICON FIELD EMITTER ARRAYS WITH A GATED STRUCTURE

概要

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Gated polycrystalline silicon field emitter arrays have been fabricated by using a combined dry and wet etching technique for tip formation and a photoresist etch-back process for gate opening. The fabricated emitter with a tip radius of 〜100 A showed electron emissions at a gate voltage of 45 V, comparable to single crystalline silicon tips processed with a sharpening oxidation. The developed method can be applicable to glass-based field emitter displays with semiconductor IC technologies.
社団法人映像情報メディア学会の論文
1997-02-14