A-3-6 VARIABLE SOURCE CMOS CIRCUIT FOR LOW POWER APPLICATIONS

スポンサーリンク

概要

• 論文の詳細を見る
• 社団法人電子情報通信学会の論文
• 2002-03-07

著者

• Yasuda T

  Ibm Japan Yasu Technology Application Laboratory

• Yasuda Takeo

  Ibm Japan Ltd.

• Hosokawa Kohji

  IBM Japan, Yasu Technology Application Laboratory

• Yasuda Takeo

  Ibm Japan

• Hosokawa Kohji

  Ibm Japan Yasu Technology Application Laboratory

関連論文

• High-Speed Wide-Locking Range VCO with Frequency Calibration (Special Section on VLSI Design and CAD Algorithms)
• Differential Analog Data Path Offset Calibration Method
• SA-3-1 AN INTERPOLATION ARCHITECTURE FOR CVSD AUDIO CODEC
• A-3-6 VARIABLE SOURCE CMOS CIRCUIT FOR LOW POWER APPLICATIONS
• Differential Analog Data Path DC Offset Calibration Methods (Special Section on Analog Circuit Techniques and Related Topics)

スポンサーリンク