Differential Analog Data Path DC Offset Calibration Methods (Special Section on Analog Circuit Techniques and Related Topics)

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概要

• 論文の詳細を見る

• DC offset causes performance degradation in signal processing systems especially for high-speed applications. A new offset cancellation method that relaxes the requirement for the offset of the circuit components in the differential analog data path to about 10 times larger is introduced. This method moves the adjusting target from analog-to-digital converter (ADC) to its input buffer and adjusts DC level of ADC input to its center before the final offset cancellation. It eliminates post-production adjustment such as fuse trimming, which increases the cost and TAT in manufacturing and testing. Execution and simulation times are shortened down to 1/9 for less settling time in buffer and with improved logic. An automatic quick offset calibration circuit is implemented in a small silicon space in a high-speed hard disk drive (HDD) channel with 0.25-μm four-layer metal CMOS process. The measured data show this method works effectively in this system.

• 社団法人電子情報通信学会の論文
• 1999-02-25

著者

• Yasuda Takeo

  Ibm Japan Ltd.

• Yasuda Takeo

  Ibm Japan

• ANDOH Hajime

  TI Japan

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• Differential Analog Data Path DC Offset Calibration Methods (Special Section on Analog Circuit Techniques and Related Topics)

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