A Versatile CMOS Analog Multiplier
スポンサーリンク
概要
- 論文の詳細を見る
This paper describes a novel four-quadrant analog multiplier. It is comprised of two mixed signal circuits, a voltage adder circuit, a voltage divider circuit and a basic multiplier. Its major advantages over the other analog multipliers are: this design has single ended inputs, the geometry of all CMOS transistors are equal, and its output can be the product of two signal currents, the product of two signal voltages, or the product of a signal current and a signal voltage. Second-order effects are analyzed, and the experimental and simulative results that confirm the theoretical analysis are carried out.
- 一般社団法人電子情報通信学会の論文
- 2003-05-01
著者
-
Dejhan Kobchai
Faculty Of Engineeringand Research Center For Communications And Information Technology King Mongkut
-
Dejhan Kobchai
Faculty Of Engineering And Research Center For Communication And Information Technology King Mongkut
-
CHAISAYUN ttipong
Faculty of Engineeringand Research Center for Communications and Information Technology, King Mongku
-
Chaisayun Ttipong
Faculty Of Engineeringand Research Center For Communications And Information Technology King Mongkut
関連論文
- New PAPR Reduction in an OFDM System Using Hybrid of PTS-CAPPR Methods with GA Coded Side Information Technique
- A Low Voltage Tristate Buffer with Complementary BiCMOS Charge Pump(VLSI Design Technology and CAD)
- Comparative Study Between DS-CDMA in Nakagami Fading Channel and Nakagami Correlating Channel Based on Numerical Results ((放送方式、放送現業、無線・光伝送)2000 Asia-Pacific Symposium on Broadcasting and Communications)
- A CMOS Voltage-Controlled Grounded Resistor Circuit
- Single/Dual Power Supply Differential Input Voltage Four-Quadrant Analog Multiplier Using Quarter-Square Technique
- COMPARATIVE STUDY OF SIMULATOR SICKNESS INDUCED BY A SINGLE-SCREEN AND THREE-SCREEN HOLOSTAGE^ USING SIMULATOR SICKNESS QUESTIONNAIRE
- A Versatile CMOS Analog Multiplier