200 MHz 128 Bit Synthesizable Core with SIMD Extension and Its Design Methodology(<特集>Special Issue on High-Performance and Low-Power Microprocessors)
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概要
- 論文の詳細を見る
The strong demand for complex and high performance system-on-a-chip requires high performance microprocessor core and quick turn around design methodology. We have developed 128-bit synthesizable core processor and tile based quick turn around design methodology. It is 200 MHz MIPS compatible processor with 128-bit SIMD extension and is targeted for consumer electronics. We also developed an ASSP including the processor core, SDRAM controller, 2 PCI and 2 MAC mainly for network applications. For SOC development, we developed a tile based design methodology aiming at quick design convergence. The initial RTL design is synthesized and partitioned to several tiles by in-house tiling tool. It promises quick turn around from RTL design to tape out using the concurrency of the back-end design.
- 社団法人電子情報通信学会の論文
- 2002-02-01
著者
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Kamada Tetsuo
Toshiba Corporation Risc Processor Development Dept. Microprocessor Division
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Kazi Shardul
ArTile Microsystems,Inc.
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Kazi Shardul
Artile Microsystems Inc.
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TERUYAMA Tatsuo
Toshiba Corporation, System LSI Research and Development Center
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SASAHARA Masashi
Toshiba Corporation, System LSI Research and Development Center
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Teruyama Tatsuo
Toshiba Corporation System Lsi Research And Development Center
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Sasahara Masashi
Toshiba Corporation System Lsi Research And Development Center
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- 斜め配線手法とRISCプロセッサコアへの適用事例
- 200 MHz 128 Bit Synthesizable Core with SIMD Extension and Its Design Methodology(Special Issue on High-Performance and Low-Power Microprocessors)