Programmable Power Management Architecture for Power Reduction(Special Issue on Novel VLSI Processor Architectures)

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概要

• 論文の詳細を見る

• This paper presents Power-Pro architecture(Programmable Power Management Architecture), a novel processor architecture for power reduction.The Power-Pro architecture has two key functionalities:(i)Supply voltage and clock frequency of a microprocessor can be dynamically varied, and(ii)active datapath width can be dynamically adjusted to the precision of each operation.The most unique point of this architecture is that software programmers can directly specify the requirements of applications such as real-time constraints and precision of the operations.To make programmable power management possible, Power-Pro architecture equips special instructions.Programmers can vary the supply voltage, the clock frequency and the active datapath width dynamically by the instructions.Experimental results show that power consumption for a variety of applications are dramatically reduced by the Power-Pro architecture.

• 一般社団法人電子情報通信学会の論文
• 1998-09-25

著者

• Yasuura Hiroto

  The Authors Are With The Department Of Computer Science And Communication Engineering Graduate Schoo

• Ishihara Tohru

  The Authors Are With The Department Of Computer Science And Communication Engineering Graduate Schoo

• Yasuura Hiroto

  The Author Is With The Department Of Computer Science And Communication Engineering Graduate School

関連論文

• Soft-Core Processor Architecture for Embedded System Design(Special Issue on Novel VLSI Processor Architectures)
• Towards the System LSI Design Technology : Special Section on the 10th Anniversary of Trans. Fundamentals : Last Decade and 21st Century
• Programmable Power Management Architecture for Power Reduction(Special Issue on Novel VLSI Processor Architectures)

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