Plate Bumping Leakage Current Measurement Method and Its Application to Data Retention Characteristic Analysis for RJB DRAM Cells (Special Issue on Low-Power LSI Technologies)
スポンサーリンク
概要
- 論文の詳細を見る
To evaluate DRAM memory-cell data retention characteristics, measuring the leakage current of the individual memory-cell is important. However, the leakage current of a DRAM memory-cell cannot be measured directly, because its value is on the order of femtoamperes. This paper describes a Plate Bumping (PB) method that can measure the leakage current of a specific memory-cell using the relationship between the shifted value of memory-cell-plate potential and the retention period. By using the PB method, it can be confirmed that the leakage current of the short-retention cell (bad cell) depends on its storage-node potential. With regards to cells with "0" data stored in them ("0" cells), it appears that the relaxed junction biasing (RJB)scheme which can extend refresh interval increases the number of misread "0" cells due to the lowering of the sense amplifier's sensing threshold.
- 社団法人電子情報通信学会の論文
- 1996-12-25
著者
-
Iwata Toru
The Semiconductor Research Center Matsushita Electric Industrial Co. Ltd.
-
Yamauchi Hiroyuki
The Semiconductor Research Center Matsushita Electric Industrial Co. Ltd.
関連論文
- High-Speed Circuit Techniques for Battery-Operated 16 Mbit CMOS DRAM (Special Section on High Speed and High Density Multi Functional LSI Memories)
- Plate Bumping Leakage Current Measurement Method and Its Application to Data Retention Characteristic Analysis for RJB DRAM Cells (Special Issue on Low-Power LSI Technologies)