A Reconfigurable Parallel Processor Based on a TDLCA Model (Special Issue on Responsive Computer Systems)
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概要
- 論文の詳細を見る
This paper proposes a reconfigurable parallel processor based on a two-dimensional linear cellular automaton model. The processor based on the model can be reconfigured quickly by utilizing the characteristics of the automaton used for its model. Moreover, the processor has short data path length between processing elements compared with the length of the processor based on one-dimensional linear cellular automaton model which has been already discussed. The processing elements of the processor based on the two-dimensional linear cellular automaton model are regarded as cells and the operational states of the processor are treated as the states of the automaton. When faults are detected, the processor can be reconfigured by changing its state under the state transition function of the processor determined by the weighting function of the automaton model. The processor can be reconfigured within a clock period required for making a state transition. This processor is extremely effective for real-time data processing systems required high reliability.
- 一般社団法人電子情報通信学会の論文
- 1993-11-25
著者
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Naito Sachio
Faculty Of Engineering Tokyo Metropolitan University
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Kawanaka Masataka
Nec Robotics Engineering Ltd.
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Tsunoyama Masahiro
Nagaoka College of Technology
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- A Method of Current Testing for CMOS Digital and Mixed-Signal LSIs
- A Reconfigurable Parallel Processor Based on a TDLCA Model (Special Issue on Responsive Computer Systems)