Performance Analysis of Lookahead Scheduling Algorithm for Input-Buffered Packet Switches
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概要
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In this paper, an analytical model for evaluating the performance of a packet scheduling algorithm, called lookahead scheduling, is proposed. Using lookahead scheduling, each input port of a switch has B packet buffers. A packet arrives at an input port is scheduled for conflict-free transmission for up to B time slots in advance. If it cannot be scheduled for transmission in the next B slots, the packet is immediately dropped to prevent it from blocking the subsequently arrived packets. To evaluate this scheduling algorithm, we first construct a set of recursive equations for obtaining the buffer occupancy and the probability that a packet cannot be placed into a buffer. Based on that, analytical expressions for switch throughput, packet loss probability and mean packet delay are derived. Analytical results are then compared with the simulations and good agreement is found. A pipeline implementation of the lookahead scheduling is also proposed in this paper.
- 社団法人電子情報通信学会の論文
- 1999-08-25
著者
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Shi Hai
Department Of Electronic Engineering City University Of Hong Kong
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YEUNG Kwan
Department of Electronic Engineering, City University of Hong Kong
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LIU Ngai
Department of Electronic Engineering, City University of Hong Kong
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Liu Ngai
Department Of Electronic Engineering City University Of Hong Kong
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Yeung Kwan
Department Of Electronic Engineering City University Of Hong Kong
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Shi Hai
Department of Biochemistry and Molecular Biology, The State Key Laboratory of Cancer Biology, The Fourth Military Medical University
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