Recognition of Floorplan by Parametric BSG for Reuse of Layout Design
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概要
- 論文の詳細を見る
In reuse of the VLSI layout design when technology migration takes place, the information to be abstracted from the original design and the data structure to store the information shall be specified. In this paper, they are assumed as the seg-based 4-direction and the parametric BSG, respectively. The parametric BSG is a BSG whose segs are generalized to take any number of units of length. The seg-based 4-direction is the right-of, left-of, above, and below relations between two rooms in accordance with the segs between them. An elegant procedure is given to map the floorplan of the model into a parametric BSG of the minimum size, keeping the abstracted seg-based 4-direction. Merits of the PBSG are discussed and a way of reuse is suggested by illustrative instances. Finally, a superior potential of the parametric BSG as the data structure is discussed empirically.
- 社団法人電子情報通信学会の論文
- 2002-04-01
著者
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Wu Zhonglin
Department Of Communications And Integrated Systems Tokyo Institute Of Technology
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Kajitani Yoji
Faculty Of Environmental Engineering The University Of Kitakyushu
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Kajitani Yoji
Faculty Of Engineering Tokyo Institute Of Technology
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Kajitani Yoji
Faculty Of International Environmental Engineering Promotion And Development Office Kitakyushu Unive
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SAKANUSHI Keishi
Department of Communications and Integrated Systems, Tokyo Institute of Technology
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