Performance Enhancement on Digital Signal Processors with Complex Arithmetic Capability (Special Section on VLSI for Digital Signal Processing)
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概要
- 論文の詳細を見る
Digital Signal Processors with complex arithmetic capability (DSP-C) are useful for various applications. In this paper, we propose a method for the effective implementation of specific circuits with real coefficients on DSP-C. DSP-C has special hardware such as a complex multiplier so that a complex calculation can be performed with only one instruction. First, we show that nodes with two real coefficient input branches can be implemented by complex multiplications. We apply this implementation to 2D circuits and transversal circuits with real coefficients. Next, we introduce a new computational mode (Advanced mode) and a new multiplier into PSI, a kind of DSP-C which has been proposed already, in order to process the circuits effectively. The effectiveness of the proposed method is shown by simulation in the last part.
- 社団法人電子情報通信学会の論文
- 1999-02-25
著者
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WATANABE Eiji
Faculty of Systems Engineering, Shibaura Institute of Technology
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Nishihara Akinori
Center For Research And Development Of Educational Technology Tokyo Institute Of Technology
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NEGISHI Yoshimasa
Faculty of System Engineering, Shibaura Institute of Technology
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YANAGISAWA Takeshi
Faculty of System Engineering, Shibaura Institute of Technology
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Yanagisawa Takeshi
Faculty Of System Engineering Shibaura Institute Of Technology
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Negishi Yoshimasa
Faculty Of System Engineering Shibaura Institute Of Technology
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Watanabe Eiji
Faculty Of Engineering Fukuyama University
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