Design and Simulation of Neural Network Digital Sequential Circuits (Special Section of Papers Selected from JTC-CSCC'93)

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概要

• 論文の詳細を見る

• This paper describes a novel technique to realize high performance digital sequential circuits by using Hopfield neural networks. For an example of applications of neural networks to digital circuits, a novel gate circuit, full adder circuit and latch circuit using neural networks, which have the global convergence property, are proposed. Here, global convergence means that the energy function is monotonically decreasing and each circuit always operates correctly independently of the initial values. Finally the several digital sequential circuits such as shift register and asynchronous binary counter are designed.

• 社団法人電子情報通信学会の論文
• 1994-06-25

著者

• Asai Hideki

  Faculty Of Engineering Shizuoka University

• NINOMIYA Hiroshi

  Faculty of Engineering, Shizuoka University

• Ninomiya Hiroshi

  Faculty Of Engineering Shizuoka University

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• Neural Networks for Digital Sequential Circuits
• Mixed Mode Circuit Simulation Using Dynamic Network Separation and Selective Trace (Special Section on the 6th Karuizawa Workshop on Circuits and Systems)
• Efficient Simulation of Lossy Coupled Transmission Lines by the Application of Window Partitioning Technique to the Waveform Relaxation Approach (Special Section on Nonlinear Theory and Its Applications)
• Sparsely Interconnected Neural Networks for Associative Memories Applying Discrete Walsh Transform (Special Section on Selected Papers from the 11th Workshop on Circuits and Systems in Karuizawa)
• A Neural Net Approach to Discrete Walsh Transform (Special Section of Letters Selected from the 1994 IEICE Spring Conference)
• Dynamically Overlapped Partitioning Technique to Implement Waveform Relaxation Simulation of Bipolar Circuits
• Design and Simulation of Neural Network Digital Sequential Circuits (Special Section of Papers Selected from JTC-CSCC'93)

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