Area Efficient ΔΣ Modulator Based on Power-Delay and Area Product for D/A Conversion(Electronic Circuits)

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概要

• 論文の詳細を見る

• An efficient way to optimize the hardware consumption in a low-voltage ΔΣmodulator for D/A converters is described. The modulator employs a ROM selection scheme for multiplications and the new buffer-and-routing ROM structure to minimize the hardware consumption. Furthermore, a guideline of the power-delay-and-area product (PDAP) for compelling issues such as power dissipation, delay time, and chip area consumption in the modem digital-circuit design is proposed. After the validity of the concept has been proved in comparison with that of the conventional guideline of the power-delay product in several behavioral blocks, it was employed in the circuit design. Fabricated in a standard digital 0.35-μm CMOS technology, the modulator achieves a signal-to-noise ratio (SNR) of 96dB with an oversampling ratio of 256 under the supply of 2.0V.

• 社団法人電子情報通信学会の論文
• 2004-08-01

著者

• Sohn Young-chul

  The Memory Division Hynix Semiconductor

• Kim Sun-ho

  The School Of Electrical Engineering Kookmin University

• Kim Daejeong

  The School Of Electrical Engineering Kookmin University

関連論文

• Efficient and Large-Current-Output Boosted Voltage Generators with Non-Overlapping-Clock-Driven Auxiliary Pumps for Sub-1-V Memory Applications(Electronic Circuits)
• Area Efficient ΔΣ Modulator Based on Power-Delay and Area Product for D/A Conversion(Electronic Circuits)

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