Offset-Compensated Direct Sensing and Charge-Recycled Precharge Schemes for Sub-1.0 V High-Speed DRAM's(Integrated Electronics)

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概要

• 論文の詳細を見る

• This paper proposes a sensing and a precharge circuit schemes suitable for low-voltage and high-speed DRAM design. The proposed offset-compensated direct sensing scheme improves refresh characteristics as well as speed performance. To minimize the number of control switches for the offset compensation, only the output branches of differential amplifiers are implemented in each bit-line pair with a semi-global bias branch, which also reduces 50-percent of bias current. The addition of the direct sensing feature to the offset-compensated pre-sensing dramatically increases the differential current output. For the fast bit-line equalization, a charge-recycled precharge scheme is proposed to reuse VPP discharging current for the generation of a boosted bias without additional charge pumping. The two circuit schemes were verified by the implementation of a 256 Mb SDRAM with a 0.1 μm dual-doped poly-silicon technology.

• 社団法人電子情報通信学会の論文
• 2004-05-01

著者

• Sim Jae-yoon

  Dram Design Team Samsung Electronics

• Chun Ki-chul

  Dram Design Team Samsung Electronics

• Seo Dong-il

  Dram Design Team Samsung Electronics

• KWON Kee-Won

  DRAM Design Team, Samsung Electronics

• Kwon K‐w

  Korea Electronics Technol. Inst. (keti) Kor

• Kwon Kee-won

  Dram Design Team Samsung Electronics

関連論文

• Offset-Compensated Direct Sensing and Charge-Recycled Precharge Schemes for Sub-1.0 V High-Speed DRAM's(Integrated Electronics)
• A Peak-Current-Reduced Full-Swing CMOS Output Driver(Analog Circuit and Device Technologies)

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