Gate Tunnelling and Impact Ionisation in Sub 100 nm PHEMTs(<Special Issue>the IEEE International Conference on SISPAD '02)

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概要

• 論文の詳細を見る

• Impact ionization and thermionic tunnelling as two possible breakdown mechanisms in scaled pseudomorphic high electron mobility transistors (PHEMTs) are investigated by Monte Carlo (MC) device simulations. Impact ionization is included in MC simulation as an additional scattering mechanism whereas thermionic tunnelling is treated in the WKB approximation during each time step in self-consistent MC simulation. Thermionic tunnelling starts at very low drain voltages but then quickly saturates. Therefore, it should not drastically affect the performance of scaled devices. Impact ionization threshold occurs at greater drain voltages which should assure a reasonable operation voltage scale for all scaled PHEMTs.

• 社団法人電子情報通信学会の論文
• 2003-03-01

著者

• Asenov Asen

  the Department of Electronics and Electrical Engineering, University of Glasgow

• Asenov Asen

  The Device Modelling Group Department Of Electronics & Electrical Engineering University Of Glas

• KALNA Karol

  the Device Modelling Group,Department of Electronics & Electrical Engineering,University of Glasgow

• Kalna Karol

  The Device Modelling Group Department Of Electronics & Electrical Engineering University Of Glas

関連論文

• RF Analysis Methodology for Si and SiGe FETs Based on Transient Monte Carlo Simulation (Special lssue on SISPAD'99)
• Gate Tunnelling and Impact Ionisation in Sub 100 nm PHEMTs(the IEEE International Conference on SISPAD '02)

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