An Image Retrieval System Using FPGAs

スポンサーリンク

概要

• 論文の詳細を見る

• The main contribution of this paper is to present an image retrieval system using FPGAs. Given a template image T and a detabese of a number of images I_1, I_2,..., our system lists all images that contain a subimage similar to T. More specifically, a hardware generator in our system creates the Verilog HDL source of a hardware that determines whether I_1 has a similar subimage to T for any image I_i and a particular template T. The created Verilog HDL source is compiled and embedded in an FPGA using the design tool provided by the FPGA vendor. since the hardware embedded in the FPGA is designed for a particular template T, it is an instance-specific hardware that allows us to achieve extreme acceleration. We evaluate the performance of our image matching hardware using a PCI-connected Xilinx FPGA and a timing analyzer. Since the generated hardware attains up to 3000 speed-up factor over the software solution, our approach is promising.

• 2003-05-01

著者

• Nakano Koji

  School Of Engineering Hiroshima University

• TAKAMICHI Etsuko

  School of Information Science, Japan Advanced Institute of Science and Technology

• Takamichi Etsuko

  School Of Information Science Japan Advanced Institute Of Science And Technology

関連論文

• An Energy-Efficient Initialization Protocol for Wireless Sensor Networks with No Collision Detection
• An Energy Efficient Leader Election Protocol for Radio Network with a Single Transceiver(Discrete Mathematics and Its Applications)
• Accelerating the CKY Parsing Using FPGAs
• An Energy Efficient Ranking Protocol for Radio Networks(Discrete Mathematics and Its Applications)
• Special Section on Foundations of Computer Science
• Randomized Time- and Energy-Optimal Routing Single-Hop, Single-Channel Radio Networks
• Halftoning Through Optimization of Restored Images : A New Approach with Hardware Acceleration
• An Image Retrieval System Using FPGAs
• Hardware n Choose k Counters with Applications to the Partial Exhaustive Search(Programmable Logic, VLSI, CAD and Layout, Recent Advances in Circuits and Systems-Part 1)

スポンサーリンク