VLSI Design for Embedded Digital Watermarking JPEG Encoder Based on Digital Camera System(VLSI Design Technology and CAD)

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概要

• 論文の詳細を見る

• In this paper a new watermarking technique which is combined with joint photographic experts group (JPEG) encoding system is presented. This method operates in the frequency domain by embedding a pseudo-random sequence of real numbers in a selected set of discrete cosine transform (DCT) coefficients. The embedded sequence is extracted without restoring the original image to fit the trend in the digital still camera (DSC) system. The proposed technique represents a major improvement on methods relying on the comparison between the watermarked and original images. Experimental results show that the proposed watermarking method is robust to several common image processing techniques, including JPEG compression, noise, and blurring. We also implement the whole design by synthesizing with TSMC 1P4M 0.35μm standard cell. The chip size is 3.064 × 3.064 mm^2 for 46374 gate counts. The simulation speed can reach 50MHz. The power dissipation is 69mW at 3.3V 50MHz.

• 社団法人電子情報通信学会の論文
• 2004-07-01

著者

• TSAI Tsung-Han

  Department of Electrical Engineering, National Central University

• Tsai Tsung-han

  Department Of Electrical Engineering National Central University

• LU Chrong-Yi

  Department of Electrical Engineering, National Central University

• Lu Chrong-yi

  Department Of Electrical Engineering National Central University

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