Low Complexity Detection for UTRA-TDD Receivers(Communication Theory and Systems)(<Special Section>Applications and Implementations of Digital Signal Processing)
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概要
- 論文の詳細を見る
In this paper we present the successful application of Prime Factor Algorithm FFT (Fast Fourier Transform) and pruning techniques to achieve low complexity UTRA-TDD detection. This approach has been applied to the Minimum Mean Square Error-Block Linear Equalizer (MMSE-BLE) receiver and to an MMSE equalizer specially designed for the downlink after their proper reformulation in the frequency domain. A complexity reduction of nearly 50% with respect to the classical 2" length FFT solutions has been demonstrated, without any performance loss. A more parallelizable VLSI architecture can be derived thanks to the modularity of the introduced FFT algorithms. Performances comparison has been carried out to confirm the validity of the proposed methods.
- 社団法人電子情報通信学会の論文
- 2004-03-01
著者
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Fanucci Luca
Ieiit National Research Council
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Grasso Riccardo
Department Of Information Engineering University Of Pisa
関連論文
- Coupling-Driven Data Bus Encoding for SoC Video Architectures(System Level Design)(VLSI Design and CAD Algorithms)
- Low Complexity Detection for UTRA-TDD Receivers(Communication Theory and Systems)(Applications and Implementations of Digital Signal Processing)