Applications of Tree/Link Partitioning for Moment Computations of General Lumped R(L)C Interconnect Networks with Multiple Resistor Loops(Physical Design)(<Special Section>VLSI Design and CAD Algorithms)

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概要

• 論文の詳細を見る

• A new moment computation technique forgeneral lumped R(L)C interconnect circuits with multiple resistor loops is proposed. Using the concept of tearing, a lumped R(L)C network can be partitioned into a spanning tree and several resistor links. The contributions of network moments from each tree and the corresponding links can be determined independently. By combining the conventional moment computation algorithms and the reduced ordered binary decision diagram (ROBDD), the proposed method can compute system moments efficiently. Experimental results have demonstrate that the proposed method can indeed obtain accurate moments and is more efficient than the conventional approach.

• 社団法人電子情報通信学会の論文
• 2004-12-01

著者

• Chu C‐c

  Department Of Electrical Engineering National Tsing Hua University

• Feng Wu‐shiung

  Department Of Electronic Engineering Chang Gung University

• Feng W‐s

  Chang Gung Univ. Twn

• Lai Ming‐hong

  Department Of Electronic Engineering Chang Gung University

• CHU Chia-Chi

  Department of Electrical Engineering, National Tsing Hua University

• LAI Ming-Hong

  Department of Electronic Engineering, Chang Gung University

• FENG Wu-Shiung

  Department of Electronic Engineering, Chang Gung University

• LEE Herng-Jer

  Department of Electrical Engineering, Chang Gung University

• Lee H‐j

  The Department Of Electrical Engineering Chang Gung University:evercad Software Corp.

• Lai Ming-hong

  Department Of Electronic Engineering Chang Gung University

• Chu Chia-chi

  Department Of Electrical Engineering Chang Gung University

• Feng Wu-shiung

  Department Of Electrical Engineering National Taiwan University

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