Design of High-Performance Charge-Pump Circuit for PLL Applications(Analog Design)(<Special Section>VLSI Design and CAD Algorithms)

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概要

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• This work proposed a high-performance chargepump circuit for phase-locked-loop (PLL) applications. The proposed charge-pump circuit is composed of a pair of wide-swing current mirror and symmetric pump circuits which can provide wide output range and have no jump phenomenon. The proposed charge-pump circuit has been designed and simulated by using the TSMC 0.35 μm 1P4M CMOS technology. Simulation results show the feasibility of proposed structure for low-voltage high-frequency applications.

• 2003-12-01

著者

• Hsu Chun-lung

  Department Of Electrical Engineering National Dong Hwa University

• Lu Wu-hung

  Department Of Electrical Engineering National Dong Hwa University

関連論文

• High-Efficiency VLSI Architecture Design for Motion-Estimation in H.264/AVC(System Level Design,VLSI Design and CAD Algorithms)
• Design of High-Performance Charge-Pump Circuit for PLL Applications(Analog Design)(VLSI Design and CAD Algorithms)

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