Trends in High-Performance, Low-Power Processor Architectures (Special Issue on Low-Power High-Performance VLSI Processors and Technologies)
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概要
- 論文の詳細を見る
This paper briefly surveys architectural technologies of recent or future high-performance, low-power processors for improving the performance and power / energy consumption simultaneously. Achieving both high performance and low power at the same time imposes a lot of Challenges on processor design, and therefore gives us a lot of opportunities for devising new technologies. The paper also tries to provide some insights into the technology direction in future.
- 社団法人電子情報通信学会の論文
- 2001-02-01
著者
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Murakami Kazuaki
The Department Of Computer Science And Communication Engineering Kyushu University
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Murakami Kazuaki
The Department Of Informatics Kyushu University
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MAGOSHI Hidetaka
the Department of Informatics, Kyushu University
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Magoshi Hidetaka
The Department Of Informatics Kyushu University
関連論文
- Trends in High-Performance, Low-Power Processor Architectures (Special Issue on Low-Power High-Performance VLSI Processors and Technologies)
- A High-Performance and Low-Power Cache Architecture with Speculative Way-Selection (Special Issue on Low-Power High-Speed CMOS LSI Technologies)
- A High-Performance/Low-Power On-Chip Memory-Path Architecture with Variable Cache-Line Size