A 15-Gbit/s Si-Bipolar Gate Array
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概要
- 論文の詳細を見る
We have developed a 15-Gbit/s 96-gate Si-bipolar gate array using 0.5-μm Si-bipolar technology, a sophisticated internal cell design, an I/O buffer design suitable for high-speed operation and high-frequency package technology. The decision circuit and 4 : 1 multiplexer fabricated on the gate array operate up to 15-Gbit/s and above 10-Gbit/s respectively. The data input sensitivity and the phase margin of the decision circuit are 53 mV_ltppgt and 288° at 10-Gbit/s operation. This gate array promises to be useful in shortening the development period and lowering cost of 10-Gbit/s class IC's.
- 社団法人電子情報通信学会の論文
- 1995-09-25
著者
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Yamaguchi Chikara
Ntt Microsystem Integration Laboratories
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Togashi M
Ntt Network Service Systems Laboratories
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Togashi Minoru
Ntt Network Service Systems Laboratories
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Yamaguchi C
Ntt Microsystem Integration Lab. Atsugi‐shi Jpn
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Kawano Ryuusuke
NTT LSI Laboratories
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Yamaguchi Chikara
NTT Electronics Technology Corporation
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Kobayashi Yoshiji
NTT LSI Laboratories
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Suzuki Masao
NTT Electronics Technology Corporation
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